HDCD Recording & Encoding Components
PACIFIC MICROSONICS Model One PACIFIC MICROSONICS Model Two
PACIFIC MICROSONICS Model One & Model Two
The Model One HDCD processor, manufactured by Pacific Microsonics, was the original HDCD processor. When it was introduced, at the time it was the state-of-the-art in 44.1 and 88.2kHz A-D conversion.
- Resolution and accuracy are unmatched
- HDCD 24-bit, 20-bit, and 16-bit
- 192, 176.4, 96, 88.2, 48, and 44.1 kHz
- Distortion products are below -120 dBfs
- Uses Pacific Microsonics' patented HDCD Dynamic Decimation Filtering
Unmatched D/A Conversion
- Resolution and accuracy are unmatched
- HDCD 24-bit, 20-bit, and 16-bit
- 192, 176.4, 96, 88.2, 48, and 44.1 kHz
- Distortion products are below -120 dBfs
- Super-resolution 44.1-to-88.2-kHz and 48-to-96-kHz D/A modes
Unmatched Digital Processing
- Unmatched accuracy and transparency
- Converts 24-bit to 20-bit or 16-bit
- Converts 16-bit HDCD to 20-bit or 24-bit
- Converts 192/176.4-kHz signals to 96/88.2 kHz and 48/44.1 kHz
- Converts 44.1/48-kHz signals to 88.2/96 kHz and 176.4/192 kHz
- Adjusts gain from -25 to +6 dB
Future-Proof Investment
- Produces unmatched CD releases
- Produces unmatched DVD-Video and DVD-Audio 192, 176.4, 96, 88.2, 48, 44.1 kHz @ 24, 20, and 16-bit releases
- Designed for surround sound; multiple Model Two units can run from one precision clock
- Produces the finest 24-bit archive masters
- Eight Motorola 56009 DSPs providing 400 millions of instructions per second (MIPS) in processing power
- Discrete, multibit A/D and D/A converters designed by Pacific Microsonics
- Ultra-low jitter; precision A/D and D/A reclocking circuitry
- Pacific Microsonics-designed 2-MHz bandwidth discrete operational amplifiers used throughout analog circuitry
- High-isolation discrete shunt power regulation used throughout
- All analog and digital circuitry shielded and electrically isolated
- Balanced, direct-coupled high common mode rejection ratio (CMRR) analog inputs and balanced +24 dBu direct-coupled analog outputs
- Isolated, independent linear power supplies
- Vibration-isolated, thermally controlled cooling fan
- Copper-plated chassis
Model Two HDCD Processor Technical Specifications
Analog OutputsConnectors: XLR-3-32Polarity: Pin 2 or 3 high (software selected)Level: +18 or +24 dBu full scale set using analog attenuationAll other levels are set using digital attenuation in 0.188-dB steps at 44.1 and 48 kHz (displayed level selection is shown in .1-dB steps for a possible indication error of ±0.094 dB). At 88.2 kHz and above, digital attenuation is in exact 0.1-dB steps.Impedance: 20 Ω balanced
Digital InputsSignal format: AES/EBU 16-bit to 24-bit word lengths; 44.1 kHz, 48 kHz, 24-bit, single wire, 88.2 kHz, 96 kHz, single wire or two wire, 176.4 kHz and 192 kHz , two wireConnectors: XLR-3-31Level: RS-422Impedance: 110 Ω balanced
Digital OutputsSignal format: AES/EBU 16-bit, 20-bit, and 24-bit word lengths; 44.1-kHz, 48-kHz, 88.2-kHz, 96-kHz, 176.4-kHz, and 192-kHz sampling ratesConnectors: XLR-3-32Level: RS-422Impedance: 110 Ω balancedOutput 1 and 2 word lengths may be independently set at 44.1 and 48 kHz.
Digital Reference InputSignal format: AES/EBU 16-bit to 24-bit word lengths; 44.1-kHz, 48-kHz, 88.2-kHz, and 96-kHz sampling ratesConnector: XLR-3-31Level: RS-422Impedance: 110 Ω balanced
Word Clock Input/Output (I/O)Signal format: 44.1-kHz, 48-kHz, 88.2-kHz, and 96-kHz square waveConnector: BNCInput level: TTLImpedance: 75 ΩThe Model Two has isolated high-impedance bridging word clock inputs and requires an external 75 Ω termination. This allows multiple units to be "daisy chained" for synchronous operation with the last unit in the chain terminated by 75 Ω. The 75 Ω word clock output is AC coupled to prevent ground loops and can be connected to most equipment with CMOS TTL-compatible 75 Ω word clock inputs.
Serial Data I/OSignal format: RS-232Connector: D-Sub 9-pin Data Terminal Equipment (used for downloading system software)
User Setup and Operating InterfaceBacklit, dot-matrix graphic display, rotary optical encoder, and software-configured switches allow software-based configuration of all setup and operating parameters. Multiple operating configurations can be stored as user-labeled presets, allowing instant setup.
Signal Level MetersTwo-channel, 66-dB range, four-color LED bar graph. "Peak" and "Over" indication selectable for duration and sensitivity, reference level variable from -6 dB to -21 dB in 1-dB steps, reference level set mode (provides .2 dB per segment resolution), calibrated digital signal word length display mode, 6-dB HDCD 16-bit "Peak Extend" level indication, display reset, and variable brightness. Peak bar or simultaneous average bar with peak dot display modes.
HDCD Signal ProcessingEight Motorola 56009 DSPs and one Pacific Microsonics PMD-100 HDCD decoder ASIC control A/D conversion, sampling rate conversion, word length conversion, digital gain adjustment, HDCD encoding and decoding, and D/A conversion.
A/D and D/A Conversion ReclockingJitter rejection knee: A/D < 1 Hz (jitter reduction at 100 Hz > 80 dB), D/A < 2.5 Hz
AC Power Requirements100/120/220/240 volts +5% to -15%, 50/60 Hz, 200 watts
DimensionsProcessor unit: 5.25" high by 19" wide by 19.5" deep (133mm by 483mm by 495mm)Enclosure is 17" wide (432mm) behind front panel.Power supply: 2.5" high by 14" wide by 12.25" deep (64mm by 356mm by 311mm)
WeightProcessor unit: 35 lbs (16 kg)Power supply: 20 lbs (9 kg)Optional Custom ATA road case: 41 lbs (19 kg)